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M61250BFP
NTSC 1 chip TV signal processor
REJ03F0088-0100Z Rev.1.0 Sep.23.2003
Description
The M61250BFP is a single-chip semiconductor integrated circuit that contains the signal processing for NTSC color television. All of the signal processing circuits for video intermediate frequencies, vocal intermediate frequencies, video, color, and polarization, as well as I2C bus control, are built in, and television sets ranging from popular-class to medium-grade sets are supported. Moreover, the M37150 8-bit microcomputer for the television and the interconnection pin are opposite each other, so that less space is required for mounting.
Features
* * * * * * * * * * * * No VCO coil for VIF required Internal unregulated vocal demodulator PLL-SPLIT SIF system for FM radio Fsc output ACL or ABCL can be selected Internal horizontal oscillation probe Internal perpendicular sawtooth wave generator Internal self-diagnosis function Internal black peak hold, AFC2, killer filter H & V pulse output for OSD Internal reset circuit and clock output for microcomputer use Internal 5 V and 8 V regulators
Applications
* NTSC color television receivers
Recommended Operating Conditions
* Power supply voltage range: 4.75 V to 5.25 (Pins 3, 4, 39, 40) 7.6 V to 8.4 V (Pins 12, 44) 8.3 V to 9.1 V (Pin 42) * Recommended power supply voltage: 5.0 V (Pins 3, 4, 39, 40) 8.0 V (Pins 12, 44) 8.7 V (Pin 42)
Rev.1.0, Sep.23.2003, page 1 of 49
M61250BFP
Pin Configuration (Top View)
V RAMP CAP AFT OUT VIF Vcc SIF Vcc RAMP OUT V RAMP F/B AFC FILTER DEF GND LOGIC GND FBP IN H OUT DEF Vcc NC R OUT G OUT B OUT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
M61250BFP
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
LIMITER IN 8.7V REG OUT NC NC Hi Vcc AUDIO ATT FILTER VREG Vcc TV/Y IN VIDEO/CHROMA Vcc DRIVE Vcc EXT/C IN CHROMA APC FILTER VIDEO/CHROMA GND DRIVE GND X-TAL 3.58 ACL/ABCL
Rev.1.0, Sep.23.2003, page 2 of 49
M61250BFP
Pin Explanations
Pin No. 1 Name V RAMP CAP Pin peripheral circuit DC voltage (V)
2
AFT OUT
0.3 to 4.7
3 4 5
VIF VCC SIF VCC RAMP OUT
5.0 V 4.6
6
V RAMP FEED BACK
Rev.1.0, Sep.23.2003, page 3 of 49
M61250BFP
Pin Explanations (cont)
Pin No. 7 Name AFC FILTER Pin peripheral circuit DC voltage (V) 3.5 V
8 9 10
DEF GND LOGIC GND FBP IN
VTH: 2.0 V (FBP Vth L = OFF) VTH: 1.0 V (FBP Vth L = ON)
11
H OUT
VOL: 0.0 V VOH: 5.4 V
12 13 14 15 16
DEF VCC NC R OUT G OUT B OUT
Rev.1.0, Sep.23.2003, page 4 of 49
M61250BFP
Pin Explanations (cont)
Pin No. 17 Name H VCO FEEDBACK Pin peripheral circuit DC voltage (V) 3.0 V
18
INTELLIGENT MONITOR
19
INV FBP OUT
VOL: 0.0 V VOH: 5.0 V
20
V PULSE OUT
VOL: 0.0 V VOH: 5.0 V
Rev.1.0, Sep.23.2003, page 5 of 49
M61250BFP
Pin Explanations (cont)
Pin No. 21 22 23 Name B IN G IN R IN Pin peripheral circuit DC voltage (V) (1) Digital OSD VIL: 0.0 V VIH: 3.0 V (2) Analog OSD 0.7 Vp-p
24
FAST BLK
0.0-0.5 V: INT RGB 1.5-3.0 V: H TONE 4.0-5.0 V: EXT RGB
25
CLK CONTROL
VTH: 3.0 V
26
SDA
VIL: 0.75 V VIH: 4.25 V
Rev.1.0, Sep.23.2003, page 6 of 49
M61250BFP
Pin Explanations (cont)
Pin No. 27 Name SCL Pin peripheral circuit DC voltage (V) VIL: 0.75 V VIH: 4.25 V
28
POWER ON CONTROL
VTH: 3.0 V
29
fsc OUT 1
3.0 V
30
MCU RESET
H: 5.0 V L: 0.0 V
Rev.1.0, Sep.23.2003, page 7 of 49
M61250BFP
Pin Explanations (cont)
Pin No. 31 Name Y SW OUT Pin peripheral circuit DC voltage (V) 1.7 V
32
MCU 5.7 VREG OUT
5.7 V
33
ACL/ABCL
34
X-TAL 3.58
3.3 V
35 36
DRIVE GND Video/Chroma GND
0.0 V
Rev.1.0, Sep.23.2003, page 8 of 49
M61250BFP
Pin Explanations (cont)
Pin No. 37 Name CHROMA APC FILTER Pin peripheral circuit DC voltage (V) 3.2 V
38
EXT/C IN
1.7 V
39 40 41
DRIVE VCC Video/Chroma VCC TV/Y IN
5.0 V
1.7 V
42 43
VREG VCC AUDIO ATT FILTER
8.7 V 2.75 V to 3.25 V
44 45 46
Hi VCC NC
8V
Rev.1.0, Sep.23.2003, page 9 of 49
M61250BFP
Pin Explanations (cont)
Pin No. 47 Name 8.7 VREG OUT Pin peripheral circuit DC voltage (V) 8.7 V
48
LIMITER IN
2.5 V
49
5.7 VREG OUT
5.7 V
50
INTER CARRIER OUT
2.3 V
Rev.1.0, Sep.23.2003, page 10 of 49
M61250BFP
Pin Explanations (cont)
Pin No. 51 Name AUDIO OUT Pin peripheral circuit DC voltage (V) 2.3 V
52
AUDIO BYPASS
2.3 V
53
EXT AUDIO IN
3.0 V
54
FM DIRECT OUT
3.0 V
Rev.1.0, Sep.23.2003, page 11 of 49
M61250BFP
Pin Explanations (cont)
Pin No. 55 Name VIF VCO FEEDBACK Pin peripheral circuit DC voltage (V) 3.0 V
56 57 58
SIF GND VIF GND VIDEO OUT
2.7 V
59
RF AGC OUT
0.3 to 4.7 V
60
VIF APC FILTER
3.0 V
Rev.1.0, Sep.23.2003, page 12 of 49
M61250BFP
Pin Explanations (cont)
Pin No. 61 62 Name VIF AGC FILTER 2 VIF AGC FILTER 1 Pin peripheral circuit DC voltage (V) 2.3 V
63 64
VIF IN (1) VIF IN (2)
1.6 V
Rev.1.0, Sep.23.2003, page 13 of 49
M61250BFP
Block Diagram
11V VIDEO OUT 1 Vp-p Vcc 5V EXT AUDIO IN 8.7V RESET to MCU from MCU INTER LIMITER CARRIER IN OUT 50 48 54 53 VIF Vcc 8.7V 5.7Vreg IF AGC VCO ADJ US/JPN HPF P-ON-ON POWER ON CONTROL MUTE FM VCO LIMITER FM DET AF AMP AUDIO SW RESET 5.7V ATT 51 AUDIO OUT VIF GND 52 4 3 57 56 ATT 43 MCU V DD 5V Vcc 8V 5V DIRECT OUT
62 VIF VCOADJ
61 32 30
60
55
58
42
47 49 28
DELAY ADJ
Rev.1.0, Sep.23.2003, page 14 of 49
BUS I/F 26 27 24 23 22 21 SDA SCL FAST BLK R IN G IN B IN 14 BRIGHT AMP V SYNC TRIG DRIVE CLAMP HV 15 BLK RGB CUT OFF 16 SERVICE SW VERTICAL EQ ELIMINATE COUNT DOWN V.RAMP 6 V COINB HVCO ADJ BGP GEN V.SHIFT HORIZONTAL COUNT DOWN Intelligent Monitoring VCO ADJ CLK CONT AFC 1 AFC GAIN H VCO AFC 2 H STOP Intelligent Monitoring H-PHASE 8V NC INV VIDEO/CHROMA Vcc 37 40 3.58MHz 39 34 29 NC 45 NC 46 17 19 10 7 Hi Vcc 44 8 9 DEF GND H COINCI. H COINB 11 H. OUTPUT 13 12 DEF Vcc V.SIZE 20 V.PULSE OUT 1 DY 5 V.OUT VERTICAL B G OUT PUT R VIDEO DET APC DET AFT BRIGHT LOCK DET AFT OUT MUTE SYNC SLICE SYNC SEP ADJ DET REF FILTER DRIVE B R B EXT INPUT (WHITE) BLUE BACK CONTRAST COLOR G EXT INPUT R EXT INPUT VIDEO VIDEO MUTE RGB MATRIX CONTRAST DEMODULATOR KILLERB CHROMA BPF TAKE OFF TINT ANGLE KILLER DET DL TIME DL FINE
RF AGC OUT
59
RF AGC
63
VIF
SAW
IF IN
VIF IN
64
AMP
AFT OUT
2
DEFEAT
BLACK STRETCH GAMMA
BLACK STRETCH GAMMA
CLAMP
ACL/ABCL
33
SHARPNESS
VIDEO TONE
Y-SW OUT
31
Y SW LPF
DELAY
ACC
HPF
TRAP SW
ACC DET
18
LPF
F.TRAP
CHROMA TRAP CHROMA APC DET VCXO VIDEO/CHROMA GND 38 25 35 36
x2
41
TV IN/ Y IN 1Vp-p EXT IN /C IN 1Vp-p
CLOCK CONTROL 5V fsc OUT
FBP INV OUT FBP IN 8V
M61250BFP
Absolute Maximum Ratings
(Ta = 25C)
Item Power supply voltage Internal power dissipation Thermal derating Ambient operating temperature Storage temperature Symbol VCC Pd Kt Topr Tstg Rating 6.0, 10.0 2026 16.2 -20 to +65 -40 to +150 Unit V mW mW/C C C
Thermal Derating (Maximum Ratings)
Internal Power dissipation Pd (W)
2.5 2.0 1.5 1.38 1.0 0.5
65
0
25
50
75
100 125
150
Ambient temperature (C)
Rev.1.0, Sep.23.2003, page 15 of 49
M61250BFP
I2C Bus Table
1. SLAVE ADDRESS= BAH(WRITE), BBH(READ)
A6 1 A5 0 A4 1 A3 1 A2 1 A1 0 A0 1 R/W 1/0
2. WRITE TABLE(input bytes )
SUB ADDRESS
DATA D7
(inhibited) 0 (inhibited) 0
HEX 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
BIN 00000000 00000001 00000010 00000011 00000100 00000101 00000110 00000111 00001000 00001001 00001010 00001011 00001100 00001101 00001110 00001111 00010000 00010001 00010010 00010011 00010100 00010101 00010110 00010111 00011000 00011001 00011010 00011011 00011100
D6 1 VIFFreq5875 0 Audio EXT 0 0 AFT Defeat 0 V1 VIF Video Out Gain 0 V1 V1 VOUT STOP 0 V0 1 1 0 0 0 V-free 0 0 Monitoring
D5 0 1 C. Clip level 0 0 V1 V0 0 V0 V0 FSC FREE 0 V0 0 0 0 0 0 1 1
D4 0 0 TRAP Off 0 0 V0 V0 Y/C V0 V0 V0 HTONE SW 0 V0 0 0 0 0 0
(inhibited)
Video Mute 0 Audio Mute 0 ABCL Gain 0
EXTRGB C. Clip
V0 1 VIF Defeat 0 Blue Back V0 HV BLK OFF 0 V1
(inhibited) 0 (inhibited) 0
D3 D2 RF Delay Adj 0 0 VIF VCO ADJ 0 0 Video T Sharp ABCL 0 0 Audio ATT 0 0 Video Tone V0 V0 Contrast Control V0 V0 EXT Y DL Fine Adj V0 0 Tint Control V0 V0 Color Control V0 V0 0 Brightness Control V0 Drive(R) 0 Drive(B) 0 Cut Off(R) 0 Cut Off(G) 0 Cut Off(B) 0 0 V-Size 1 V0 0 0 0 0 0 1
D1 0 0
Black Stre. Off
D0 0 0 Take Off 0 0 V0
INITIAL 40H 20H 00H 00H 20H 40H 80H 40H 40H 04H 80H 40H 40H 80H 80H 80H 24H 20H 00H 00H 03H 00H 90H 40H 00H 00H 00H 00H 04H
0 0 V0
V0 V0 Y DL Time Adj 0 0 V0 V0 0 V0 0 0 0 0 0 H VCO Adj 0 0 TRAP Fine Adj 0 V Shift 0
(inhibited)
V0 V0 0 V0 0 0 0 0 0 0 0 0 0 1 Killer level 0 0 V0
0 0 0 0 0
(inhibited)
1 1 1 White Back 0
(inhibited)
0 0
0
0 0 H-free V.1Window 0 0 Black Strech Discharge 0 0 AFC1 Gain AFC2 Gain 0 0 Aoto slice down VSYNCDET 1 0 0
Test1 0 BGPFBP OFF 0 Test3 0 0 TEST4 0 0 Test2 0 0 0 VFREE INT 0
0 0 YSW LPF H Start 0 0 Black Strech Charge 0 0 OSD level Analog OSD 0 0 FBP Vth L 0 1 V0
0 0 0 0 (inhibited) 0 0
0 0 Gamma Control 0 0 Service SW 0 0
S.Slice Down2 S.Slice Down1
0 0 0 V0
0 US/JPN SW 0 AFC2 H Phase 0 V0
(inhibited) 0 (inhibited) 0 (inhibited) 0 0 1
1 0 0 V0
0 0 0 0 VBLK SHIFT 0
(reserved)
V1
V0
0 0 0 (inhibited) 0
0 0 0 0 VBLKSHIFT ON 0
NOTE: V0 / V1 ==> V- LATCH BIT
3. READ TABLE (output bytes)
SUB ADDRESS
00H
00000000
D7 KILLERB
D6 (not asigned)
D5 VCOINB
D4 STDETB
D3 AFT0
D2 AFT1
D1 HCOINB
D0 (not asigned)
Rev.1.0, Sep.23.2003, page 16 of 49
M61250BFP
Bus Functions
WRITE
FUNCTION VIF SIF RF delay adj VIF VCO adj VIF freq. 58.75 VIF Video out gain AFT defeat VIF defeat Audio ATT Audio EXT Audio mute VIDEO Video tone Contrast control EXTRGB contrast clip C. clip level Y DL time adj Y DL fine adj EXT Y/C Y SW LPF Video tone sharp Video mute TRAP off TRAP fine adj Black stretch off Black stretch charge Black stretch discharge Gamma control CHROMA Tint control Color control Take off US/JPN SW Killer level Fsc BIT 7 6 1 3 1 1 7 1 1 6 7 1 1 2 1 1 1 1 1 1 1 2 1 2 2 2 7 7 1 1 1 1 SUB ADD 00H 10H 01H 06H 04H 07H 03H 02H 03H 04H 05H 05H 02H 06H 06H 06H 06H 13H 02H 02H 02H 12H 02H 14H 14H 12H 07H 08H 02H 15H 15H 09H DATA D0-D6 D0-D5 D6 D5-D7 D6 D7 D0-D6 D6 D7 D0-D5 D0-D6 D7 D5 D0-D1 D2 D3 D4 D5 D3 D7 D4 D0-D1 D1 D4-D5 D6-D7 D2-D3 D0-D6 D0-D6 D0 D1-D3 D0 D5 DISCRIPTION RF AGC delay point adjustment VIF VCC free-running frequency adjustment (adjust by setting VIF Defeat = 1 to center the AFT output) IF 45.75/58.75 switching; 0: 45.75, 1: 58.75 MHz Pin 58 IVF video-detection-wave output level adjustment AFT output on/off (defeat) switching; 0: AFT on (non defeat), 1: Defeat VIF AGC gain normal/minimum switching; 0: AGC function, 1: Defeat (minimum gain) Pin 51 audio output level adjustment Audio internal signal and external signal input switching; 0: internal, 1: external Pin 53 audio direct output on/off (mute) switching; 0: audio on (non-muted), 1: mute Sharpness level control Contrast level control EXT RGB contrast lower-limit clipping on/off; 0: clipping on, 1: clipping off EXT RGB contrast lower-limit clipping level switching; 0: low (20H), 1: high (40H) Y signal delay adjustment Y signal delay fine adjustment Video input pins 41/38 switching; 0: pin 41, 1: pin 38 Pins 38/41 composite input/YC input switching; 0: composite, 1: Y/C mode Pin 31 (Y SW OUT) output f-characteristic switching; 0: flat, 1: LPF (fc=700 kHz) Video tone level two level (sharp/soft) switching; 0: standard (soft), 1: sharp Y signal output on/off (mute) switching; 0: mute off, 1: mute Y signal chroma trap on/off switching; 0: trap on, 1: trap off Chroma trap frequency fine adjust Black stretch circuit on/off switching; 0: black stretch on, 1: black stretch off Black stretch charge time constant adjustment Black stretch discharge time constant adjustment Gamma level adjustment Hue control Color level control Chroma BPF take-off function on/off switching; 0: BPF; 1: take off US mode/JPN mode switching; 100: US mode, 011: JPN mode Colorkiller sensitivity switching (active shallow direction); 0: 41 dB,1: 34 dB X'tal oscillation circuit forced free-running mode; 0: off, 1: free-running INITIAL 40H 20H 0 80H 0 0 00H 0 0 20H 40H 0 0 X0H 0 0 0 0 0 0 0 X0H 0 0XH 0XH X0H 40H 40H 0 0 0 0 V Latch V Latch V Latch V Latch V Latch V Latch V Latch NOTE
Rev.1.0, Sep.23.2003, page 17 of 49
M61250BFP
Bus Functions (cont)
WRITE (cont)
FUNCTION RGB Brightness control Driver (R) Driver (B) Cut off (R) Cut off (B) Cut off (B) Blue back White back ABCL ABCL gain OSD level HTONE SW Analog OSD DEF AFC2 H phase Ramp stop Service SW H start AFC 1 gain AFC 2 gain H VCO adj V shift V-size H-free V-free S slice down 1 S slice down 2 Audio slice down FBP Vth L HV BLK OFF V SYNK DET 1 window BGPFBP OFF VREF INT VBLK SHIFT ON VBLK SHIFT Monitoring Test1 Test2 Test3 Test4 BIT 8 7 7 8 8 8 1 1 1 1 1 1 1 5 1 1 1 1 1 3 3 6 1 1 1 1 1 1 1 1 1 1 1 1 3 4 1 1 1 1 SUB ADD 0AH 0BH 0CH 0DH 0EH 0FH 08H 10H 02H 04H 15H 09H 15H 16H 09H 13H 13H 15H 15H 10H 13H 11H 13H 10H 14H 14H 16H 16H 09H 16H 13H 19H 1CH 1CH 1CH 12H 18H 19H 1AH 1CH DATA D0-D7 D0-D6 D0-D6 D0-D7 D0-D7 D0-D7 D7 D7 D2 D7 D5 D4 D4 D0-D4 D6 D3 D4 D7 D6 D0-D2 D0-D2 D0-D5 D7 D6 D2 D3 D6 D5 D7 D7 D6 D7 D6 D3 D0-D2 D4-D7 D6-D7 D6 D6-D7 D6 DISCRIPTION Bright level control R output level control B output level control R output DC level control G output DC level control B output DC level control Blue back screen on/off switching; 0: off, 1: blue back White raster on/off switching; 0: off, 1: white back ABCL on/off switching; 0: off, 1: ABCL on ABCL sensitivity low/high switching; 0: low, 1: hi OSD level (70%/90%) switching; 0: 70%, 1: 90% Halftone on/off switching; 0: off, 1: halftone OSD input digital/analog switching; 0: digital, 1: analog Screen horizontal position adjustment Pin 5 VOUT (ramp/pulse) forced stop mode (when stopped, pin 5 at DC GND level); 0: VOUT, 1: STOP Vertical output on/off switching; 0: vertical output on, 1: vertical output off Horizontal output out/stop switching; 0: stop, 1: H out Horizontal AFC gain a high/low switching; 0: low, 1: hi Horizontal AFC2 gain high/low switching; 0: high, 1: low H VCO free-running frequency adjustment Vertical ramp start timing adjustment Vertical ramp amplitude adjustment Horizontal output forced free-running mode on/off switching; 0: off, 1: horizontal free-running Vertical output forced free-running mode on/off switching; 0: off, 1: vertical free-running Sync detection slice level (50%/30%) switching; 0: 50%, 1: 30% Sync detection slice level (50%/40%) switching; 0: 50%, 1: 40% Sync detection slice level (50%/40%) switching during image period; 0: slice level fixed, 1: slice level reduced Pin 10 (FBP in) slice level switching during image period; 0: Vth = 2V (HBLK width: narrow), 1: Vth = 1 V (HBLK width: wide) Horizontal/vertical blanking on/off switching; 0: blanking on, 1: blanking off Vertical minimum sync detection width switching; 0: sync detect width =18 s, 1: sync detect width =14 s Vertical sync detection switching (1 window/2 window s); 0: 2 windows, 1: 1 window Internal BGP on/off switching when no FBP input; 0: BGP on, 1: BGP off Interface/non-interface switching at vertical free-running 0: Normal (VBLK shifts by VSHIFT), 1: Vertical blanking width can be setted by un-interlocking VSHIFT D0-D2: VBLK SHIFT (Initial value: 100=4) Pin 18 intelligent monitoring mode switching NO use for Customer (Test bit) NO use for Customer (Test bit) NO use for Customer (Test bit) NO use for Customer (Test bit) INITIAL 80H 40H 40H 80H 80H 80H 0 0 0 0 0 0 0 90H 0 0 0 0 0 24H X0H 20H 0 0 0 0 0 0 0 90H 0 0 04H 04H 04H 0XH 0 0 0 04H NOTE V Latch
Rev.1.0, Sep.23.2003, page 18 of 49
M61250BFP READ
FUNCTION KILLERB AFT0 AFT1 HCOINB FM STDETB VCOINB STDETB BIT 1 1 1 1 1 1 1 SUB ADD 00H 00H 00H 00H 00H 00H 00H DATA D7 D3 D2 D1 D6 D5 D4 DISCRIPTION Colorkiller information output; "1" when killer off AFT information output (See note 1) AFT information output (See note 1) Horizontal sync detection; "1" when asynchronous FM radio mode detection; "1" when not detected Vertical sync detection; "1" when asynchronous TF mode detection; "1" when not detected
Note: 1.
Rev.1.0, Sep.23.2003, page 19 of 49
M61250BFP
Test Circuits
FAST BLK IN EXT R IN EXT G IN EXT B IN SDA
SCL
A P32 P31 P30 P29 P24 P20 P19 P18 P17
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
N.K.D Part number M351T01
4.7
P33
33 34
16 15 14 13 12 11 10
P16
2.2K
P15
120p
3.579545MHz
2.2K
35 36
P37
P14
2.2K 0.015 0.01
A
37 38 39 40 41
47
P11 P10
8.2K 75
1 1
M61250BFP
9 8 7 6 5 4 3 2 1
P2 P1 P7
10K
1 47 + 0.01 47
A
75
1 +
42 43 44 45 46
SW7 6.8K 20K
P6 P5
0.01
1
A
0.01
+ 0.01
P47
47 0.1
47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
1
SIF IN
0.01 50
P49
P50
P51
P52
P53
P54
P55
P58
P59
P60
P61
P62
50
VR 20K
8
7
6
5
4
3
2
1
M74LS221P
9 10 11 12 13 14 15 16
4700p
Rev.1.0, Sep.23.2003, page 20 of 49
M61250BFP
Input Signals
1. 10.1 VIF/SIF Block
SG No. SG1 SG2 SG3 SG4 SG5 SG6 SG7 SG8 SG9 SG10 SG11 SG12 SG13 SG14 SG15 SG16 SG17 SG18 SG19 SG20 SG21 Signal description (50 termination) fo = 45.75 MHz, 90 dB, fm = 20 kHz, AM 77.8% fo = 58.75 MHz, 90 dB, fm = 20 kHz, AM 77.8% fo = 45.75 MHz, 90 dB, CW f1 = 45.75 MHz, 90 dB, CW f2 = 45.75 4.5MHz, 70 dB, CW fo = 45.75 MHz, amplitude width variable, fm = 20 kHz, AM 77.8% fo = 45.75 MHz, amplitude width variable, fm = 20 kHz, AM 16% fo = 45.75 MHz, 80 dB, fm = 20 kHz, CW fo = 45.75 MHz, 110 dB, fm = 20 kHz, CW fo = 40.75 to 50.75 MHz (frequency variable), 90 dB, CW fo = 45.75 MHz, 90 dB, CW fo = 45.75 MHz, 90 dB, CW fo = 53.75 to 63.75 MHz (frequency variable), 90 dB, CW f1 = 45.75 MHz, 90 dB, RED raster signal, AM = 87.5% video modulation, f2 = 4.5 4.5MHz, CW, P/S = 20 dB fo = 45.75 MHz, standard 10-step wave, sync rate: 28.6%, AM = 87.5% video modulation, sync chip level: 90 dB fo = 45.75 MHz, 93 dB, CW fo = 45.75 MHz, 73 dB, CW fo = 4.5 MHz, 100 dB, fm = 400 Hz, FM 25 kHz dev. fo = 4.5 MHz, 100 dB, fm = 400 kHz, AM 30% fo = 4.5 MHz, 100 dB, CW fo = 400 Hz, 500 mVrms, CW fo = 0.5 to 8.5 MHz, 100 dB, fm = 400 kHz, FM 25 kHz dev.
Rev.1.0, Sep.23.2003, page 21 of 49
M61250BFP 2. Video/Chroma/RGB/DEF Block
SG No.
Signal description (75 termination) NTSC format APL 100% typical video signal. Vertical signal is interlaced at 60 Hz.
4.7s
0.714V 1Vp-p
SG. A
0.286V 1.5s 5.8s
SG. B
In the SG.A signal, the Lumi. signal frequency and amplitude can be changed. However, typical amplitude is 0.714 Vp-p. In the figure on the right, the Lumi. signal is represented by f.
f 4.7s
1.5s 5.8s
NTSC typical monochrome video signal. Vertical signal is interlaced at 60 Hz. SG. C
0.286V
4.7s
0.572V
0.286V 5.8s 1.5s
NTSC format video signal; APL variable. Vertical signal is interlaced at 60 Hz. SG. D
4.7s
Vy
0.286V 1.5s 5.8s
NTSC format monochrome video signal. In the SG.C signal, the burst and chroma part frequency and amplitude can be changed. Vertical signal is interlaced at 60 Hz.
4.7s
SG. E
Typical state: Veb=0.286V, Vec=0.572V f eb=f ec=3.579545MHz
Veb 0.286V 5.8s feb fec 1.5s
Vec
Fast blanking signal; synchronized with video input signal. 0V 20s 24s
2.0V
SG. F
Fast blanking signal; synchronized with video input signal. 0V 20s 24s
Vosd
Rev.1.0, Sep.23.2003, page 22 of 49
M61250BFP 2. Video/Chroma/RGB/DEF Block (cont)
SG No. SG. G
Signal description (75 termination) NTSC format rainbow color bar video signal. Vertical signal is interlaced at 60 Hz. Duty 90%, variable frequency, variable level. (Typical: 1 Vp-p)
SG. H
1Vp-p
Duty variable (typical 95%), frequency variable, level variable (Typical: 1 Vp-p) SG. I
1Vp-p
NTSC format typical color bar video signal; vertical signal is interlaced at 60 Hz. SG. J
4.7s
0.714V
0.286V 1.5s 5.8s
SG. K
NTSC format, typical 8-step wave signal; vertical signal is interlaced at 60 Hz.
Rev.1.0, Sep.23.2003, page 23 of 49
M61250BFP
Setup instruction for evaluation PCB
1. Horizontal blanking pulse adjustment The horizontal blanking pulse timing and pulse width are adjusted using the variable resistances of a one-shot multivibrator, as shown below.
Pin 11 (H OUT)
8s
Horizontal blanking pulse 12s
The timing is adjusted to 8 s using the pin 15 variable resistance of the M74LS221P TTL IC. Also, the pulse width is adjusted to 12 s using the pin 7 variable resistance. 2. VIF VOC adjustment Before carrying out the M61250BFP measurements, the VIF VCO should be adjusted using the following procedure. (1) Input the I2C bus data for the VIF frequency (01H D6) based on the IF frequency. (45.75 MHz: 0, 58.75 MHz: 1) (2) Input the I2C bus data for VIF Defeat ON (07H D7 = 1). (3) Adjust the I2C bus data for the VCO control (01H D0 - D5) so that the voltage of Pin 2 (AFT OUT) is closest to 2.5 V. (4) Input the I2C bus data for VIF Defeat OFF (07H D7 = 0).
Voltage
2.5V
45.75MHz (or 58.75MHz)
3. H VCO adjustment
Frequency
Prior to measurement of the M61250BFP, the following method is used for H VCO adjustment. (1) The H VCO control I2C bus data (1 CH D0-D3) is adjusted, and the pin 11 (H OUT) frequency is set to approx. 15.734 kHz.
Rev.1.0, Sep.23.2003, page 24 of 49
Symbol Unit Max Pin 28=5 V, pin 25=5 V, pin 24=0 V 39,40 12,44
3,4,39,4 0
Item Notes
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
Input signal SG Min. 40 20 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 00 Typ.
Test point Limits
Subaddress
Pin
ICC 95 32 4 Pin 28=5 V, pin 25=0 V, pin 24=0 V Pin 28=0 V Pin 28=5 V Pin 28=5 V Pin 28=0 V Pin 28=5V, pin 25=5V 27 100 kHz 26,27 3.5 4.25 5.0 V 26,27 0.0 0.75 1.5 V 1 mA 40 adj 02 00 20 40 32 4 4.2 4.4 V 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 30 0 0.5 V 30 4.5 5 5.5 V 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 32 5.4 5.65 5.9 V 32 5.4 5.65 5.9 V 49 5.5 5.75 6.0 V 47 0 0.3 V 47 8.3 8.7 9.1 V Pin 28=5 V 28 2.6 3 3.4 V 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 6 8 mA 8.7 VREG Vcc 00 00 88 40 00 00 00 00 17 mA 25 mA 42 52 mA Deflection/RGB Drive 8V Vcc 57 mA 57 mA 115 135 mA VIF/SIF/VIDEO/Chroma Vcc
Typical conditions
M61250BFP
ICC5V 3,4
5V current drawn by the circuit (pins 3, 4, 39, 40)
-
ICC34
-
Pins 3 and 4 current drawn by the circuit Pins 39 and 40 current ICC3940 drawn by the circuit Reference data VIF/SIF/Vcc Reference data VIDEO/Chroma Vcc
42 44 12
-
ICC8V
8V current drawn by the circuit
-
ICC12
-
ICC44
Pin 12 current drawn by the circuit Pin 44 current drawn by the circuit Reference data Deflection Vcc Reference data RGB Drive 8V Vcc
-
Electrical Characteristics
ICC42
-
Power
00
Rev.1.0, Sep.23.2003, page 25 of 49
00 00
Vth28
Pin 42 current drawn by the circuit Power supply circuit typical conditions Power on control threshold voltage
-
V47H
8.7 VREG output voltage 1
V47L
8.7 VREG output voltage 2
V49
5.7 VREG output voltage 1
V32H1
-
V32H2
MCU 5.7 VREG output voltage 1 MCU 5.7 VREG output voltage 2
-
Reset
Reset typical conditions
V30H
-
V30L
TH32
Maximum reset output voltage Minimum reset output voltage Reset threshold voltage
-
-
IIC
IIC typical conditions
-
I ACK
ACK current
-
Reference data
VIL
SCL/SDA VTH(L)
-
VIH
SCL/SDA VTH(H)
-
FSCL
Clock frequency
-
(Ta = 25C)
Symbol Unit Max. Pin 28=5 V, pin 25=5 V, pin 24=0 V SG1 SG2
+40
Item Notes Pin 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 SG Min. Typ.
Input signal
Test point Limits
Subaddress
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
VIF 58 58 58 58 58 58 62 62 62 58 2
mV/kHz
IF typical conditions 58 0.8 0.8 43 4 100 50 3.8 2.3 1.3 0 7 4.2 2.0 1.5 2.6 1.5 2.6 42 dB 4.0 MHz VCU58-VCL58 -1.8 -1.1 MHz Center frequency=58.75MHz 2.2 MHz Center frequency=58.75MHz 4.0 MHz VCU45-VCL45
+40 +40
00
00
00
00
M61250BFP
Vdc 1.2 1.2 50 5.4 45 108 4.3 2.8 1.8 0.1 10 4.7 0.3 2.5 2.2 -1.8 -1.1 MHz Center frequency=45.75MHz MHz Center frequency=45.75MHz 3.0 V 0.8 V 80 V 13 0.2 Vpp 80 2.3 V 3.3 V 4.8 V dB Vo max - Vo min dB 50 dB MHz dB 1.5 Vpp 1.5 Vpp
Video-detection-waveform output direct current voltage
2.2
2.7
3.2
V
Pin 62=0 V
Vo4575
Vo5875 63,64 63,64 63,64 63,64 63,64 63,64 63,64 63,64 63,64 SG10 63,64 SG11 63,64 63,64 63,64 SG12 63,64 SG12 63,64 SG13
Video-detection-waveform 63,64 output (45.75 MHz) Video-detection-waveform 63,64 output (48.75 MHz) SG3 SG4 SG5 SG6 SG7 SG8 SG1 SG9 2 2 2 58 58 58 58 58 58 58
P/N
Video S/N
Vf
Video frequency characteristics
Vin min
Input sensitivity
Vin max Maximum allowable input
Rev.1.0, Sep.23.2003, page 26 of 49
SG9 SG9 -
GR
AG control range
V63H
IF AGC maximum voltage
V63T
IF AGC voltage (80 dB)
V63L
IF AGC minimum voltage
Vdefeat
VIF DETEAT function
AFT
AFT-detection-waveform sensitivity
V60H
AFT maximum voltage
V60L
AFT minimum voltage
V60D
AFT DETEAT function
VCU45
VCL45
VCT45
VCU58
VCL58
VCT58
Capture range (45.75MHz upper) Capture range (45.75MHz lower) Capture range (45.75MHz total) Capture range (58.75MHz upper) Capture range (58.75MHz lower) Capture range (58.75MHz total)
IM
Inter modulation
Reference data
Symbol Pin
63,64 SG14 63,64 SG14
Item SG Min. 58 58 59 59 59 59 58 Pin 28=5 V, pin 25=5 V, pin 24=0 V 48 48 48 48 48 7F 40 7F 53 48 48 48 48 SG17 51 -80 -69 dB SG17 51 280 400 550 mVrms 7F SG21 54 3 4.0 MHz Variable input frequency SG21 54 5.5 7.5 MHz Variable input frequency SG20 51 -4.1 -2.1 -0.1 dB SG19 51 49 55 dB SG18 54 48 54 dB SG17 54 46 58 dB SG17 54 0.5 3 % SG17 54 280 400 520 mVrms 54 2.2 3.0 3.8 V 80 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 25 28 33 % 24 20 00 10 00 00 88 40 00 00 33 43 dB DLPH-DLPL 007F 58 71 dB 7F 95 108 dB 00 0.2 0.7 V 4.3 4.8 V 3 deg 3 % Typ. Max.
Input signal Unit Notes
Test point Limits
Subaddress
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
DG
DG
Reference data Reference data
M61250BFP
DP 63,64 SG15 63,64 SG16 63,64 63,64 63,64 SG14 SG5 SG5
DP
V62H
RF AG maximum voltage
V62L
RF AG minimum voltage
DLPH
DLPL
DLP
RF AG delay maximum point RF AG delay minimum point RF AG delay point adjustment range
SPN
Sync rate
Rev.1.0, Sep.23.2003, page 27 of 49
00
SIF
SIF typical conditions
00
00
VAF
AF direct output DC voltage
VoAF
AF direct output voltage
THD AF AF distortion rate output
LIM
Input limit sensitivity
AMR
AMR
AFSN
AF S/N
GEAu
EXT Audio gain
SIF capture range (upper) SIF capture range SCFL (lower) VOLAudio output maximum max amplitude Audio output maximum VOL-min attenuation
SCFU
Symbol Pin 41 38 38 38 38 38 38 38 38 38 38 SG. A SG. B 1.0 7 -6 -1 -9 0.01 -45 -35 dB 80 0.03 0.05 V -5 -1 dB f=5MHz 2 5 dB f=2MHz 8C 8C adj 8C 7F 8C -2 2 dB f=2.5MHz 00 8C 00 00 00 00 00 adj 80 10 14 dB f=2.5MHz 3F 8C 00 1.4 1.8 V f=2.5MHz 8C 00 SG. B SG. B SG. B SG. B SG.K SG.A 120 200 280 nS YDL4=measured value -YDL3 measured value 8F 00 38 38 38 38 38 38 38 SG. A 120 200 280 nS YDL3=measured value -YDL2 measured value 8E 00 SG. A 120 200 280 nS YDL2=measured value -YDL1 measured value 8D 00 SG. A 190 260 330 nS 8C 00 SG.C -20 dB At Trap fine adj. adjustment 8C 00 SG.C -18 dB 8C 00 SG.B -4 -1 dB f=5MHz, C-trap : OFF 10 7F 8C 00 02
0003
Item SG SG.A SG.A SG.A SG.A 12 15 18 dB 7F 8C 00 2.9 4.2 5.6 V 7F 8C 00 31 1.6 2.0 2.6 Vpp 8C 31 1.6 2.0 2.6 Vpp Pin 28=5 V, pin 25=5 V, pin 24=0 V 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 Min. Typ. Max.
Input signal Unit Notes
Test point Limits
Subaddress
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
VIDEO
Video typical conditions
00
00
00
00
M61250BFP
2AGTV
2AGEV
Video SW output level (TV input) Video SW output level (External input)
Ymax
Maximum video output
GY
Video gain
FBY
Video frequency characteristic
CRF1
Chroma trap attenuation 1
TRF
Chroma trap maximum attenuation
YDL1
YDL time 1
Rev.1.0, Sep.23.2003, page 28 of 49
14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16
YDL2
YDL time 2
YDL3
YDL time 3
YDL4
YDL time 4
GTnor
GTmax
GTmin
GT2M
GT5M
BLS
Video tone control characteristic 1 Video tone control characteristic 2 Video tone control characteristic 3 Video tone control characteristic 4 Video tone control characteristic 5 Black expansion characteristic
VMF
Video mute function
Symbol Pin SG SG.C SG.C SG. E Veb, Vec: typical input level +6 dB Veb, Vec: typical input level -20 dB V = 800 mV 88 88 88 88 88 88 20 20 20 20 88 88 88 F7 88 00 88 88 88 88 20 20 02 88 88 88 FF FF FF 88 FF 08 08 06 06 Veb, Vec: variable Veb = 0mV feb=fec: variable feb=fec: variable fec=feb+50kHz 88 SG.E SG.E SG.E SG.E SG.E SG.E SG.E SG.J SG.J SG.J SG.J SG. E 59 59 59 59 29
3.5793 3.5796 3.5799
Item Min. 59 59 59 59 59 59 59 59 59 59 0.40 86 73 30 30 MHz Vpp MHz Vpp 45 60 deg feb=fec+50kHz 45 60 deg feb=fec+50kHz 90 107 deg fec=feb+50kHz 103 120 deg fec=feb+50kHz 0.47 1.31 0.43 1.33 0.57 0.80 300 600 Hz -600 -300 Hz -45 -30 dB -43 -35 dB -3 2 5 dB -4.5 0 1.5 dB -3 0 3 dB 88 640 920 1290 mV 88 390 560 790 mV 88 Pin 28=5 V, pin 25=5 V, pin 24=0 V 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 C0 40 80 80 80 80 80 80 80 80 40 40 40 40 40 40 40 40 40 40 40 40 40 40 40 80 80 40 40 Typ. Max.
Input signal Limits Unit Notes
Test point
Subaddress
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 SG. C 29
29
3.5790 3.5795 3.5810
M61250BFP
CHROM Chroma typical c A onditions Chroma typical output CnorR (R-Y) Chroma typical output CnorB (B-Y)
00
00
00
ACC1
ACC characteristic 1
ACC2
ACC characteristic 2
OV
VikN
KillP
Chroma overload characteristic Killer operation input level Color remaining on colorkilling
Rev.1.0, Sep.23.2003, page 29 of 49
14,15 15,16 14,15 15,16 Reference data Reference data Reference data Reference data
SG. E SG. E SG. E SG.C 1.4 2 2.6 C0/ 80 C0/ 80 C0/ 80 C0/ 80 C0/ 80 C0/ 80 C0/ 80 38 38 SG.C 29 1.4 2 2.6 SG.C
APCU
APC pull-in range (upper)
APCL
APC pull-in range (lower)
R/BN
Demodulation ratio
R/BU
G/BU
R/BJ
G/BJ
Demodulation ratio (US mode) Demodulation ratio (US mode) Demodulation ratio (JPN mode) Demodulation ratio (JPN mode)
R-YN1
Demodulation angle 1
R-YN2
Demodulation angle 2
TC1
TC2
TINT control characteristic 1 TINT control characteristic 2
Ffsc
fsc output frequency
Vfsc
fsc output amplitude 1
fsc output frequency Ffscfree in fsc free mode fsc output amplitude 1 Vfsc in fsc free mode
Symbol Pin SG SG.A SG.B SG.B SG.A SG.A Pin 33 =0.0 V Pin 24 =2.5 V Vy = 0.0V 88 88 88 88 88 88 88 Vosd = 1.0V, SW23=ON 88 88 88 88 88 88 88 88 88 Vosd = 0.7V Vosd = 0.7V Vosd = 0.7V 40 40 40 88 88 88 00 00 00 10 10 10 Vosd = 1.0V, SW22=ON Vosd = 1.0V, SW21=ON 00 00 00 00 00 00 00 20 20 20 00 00 00 00 00 00 00 00 00 7F 7F 00 00 00 FF 00 Vy = 0.0V Vy = 0.0V 00 88 00 0.50 1.7 2.3 2.0 2.0 -5.0 -5.0 1.0 1.0 1.0 200 200 200 -350 -350 -350 1.2 1.2 1.2 2.1 3.0 Vpp 2.1 3.0 Vpp 2.1 3.0 Vpp 0 350 mV 0 350 mV 0 350 mV 300 400 mV 300 400 mV 300 400 mV 1.5 2.0 Vpp 1.5 2.0 Vpp 1.5 2.0 Vpp -3.0 -1.0 dB -3.0 -1.0 dB 4.0 6.0 dB 4.0 6.0 dB 1.3 2 V 3 V 2.1 2.5 V 0.65 0.80 V 100 200 mV 88 00 2.2 2.8 3.3 V Pin 33 =2.9 V 88 00 200 300 mV f=100kHz 00 88 00 2.2 2.8 3.3 Vpp f=100kHz 88 00 0 0.1 0.3 V 88 00 Pin 28=5 V, pin 25=5 V, pin 24=0 V 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 38 38 38 38 38 21,22, SG.F 23 38 38 38 38 38 38 38 14 15 16 14 15 16 14 15 16 SG.A 16 SG.A 14 SG.A 16 SG.A 14 SG.D SG.D SG.D Min. 00 Typ. Max.
Item
Input signal Limits Unit Notes
Test point
Subaddress
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
RGB
RGB typical conditions
00
00
00
M61250BFP
VBLK
Output blanking voltage
GYtyp
GYmin
GYEnor
GYEmin
GYEclip
Lum nor
Rev.1.0, Sep.23.2003, page 30 of 49
14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 23,24, 38 22,24, 38 21,24, 38 23,24, 38 22,24, 38 21,24, 38 Vosd = 1.0V, SW23=ON EXD2(R)=Measured value- EXD1(R) Vosd = 1.0V, SW22=ON EXD2(G)=Measured value- EXD1(G) Vosd = 1.0V, SW21=ON EXD2(B)=Measured value - EXD1(B) SG.F, SG.A SG.F, SG.A SG.F, SG.A SG.F, SG.A SG.F, SG.A SG.F, SG.A 23,24, 38 22,24, 38 21,24, 38 SG.F, SG.A SG.F, SG.A SG.F, SG.A
Lum max
Lum min
D(R)1
D(B)1
D(R)2
D(B)2
EXD1(R)
EXD1(G)
EXD1(B)
EXD2(R)
EXD2(G)
EXD2(B)
EXD1(RG)
EXD1(GB)
EXD1(BR)
EXA(R)
EXA(G)
EXA(B)
Contrast control characteristic 1 Contrast control characteristic 2 Contrast control characteristic 3 Contrast control characteristic 4 Contrast control characteristic 5 Brightness control characteristic 1 Brightness control characteristic 2 Brightness control characteristic 3 R driving control characteristic 1 B driving control characteristic 1 R driving control characteristic 2 B driving control characteristic 3 Digital OSD (R) I/O characteristic 1 Digital OSD (G) I/O characteristic 1 Digital OSD (B) I/O characteristic 1 Digital OSD (R) I/O characteristic 2 Digital OSD (G) I/O characteristic 2 Digital OSD (B) I/O characteristic 2 Digital OSD (R-G) amplitude difference Digital OSD (G-B) amplitude difference Digital OSD (B-R) amplitude difference Analog OSD (R) I/O characteristic Analog OSD (G) I/O characteristic Analog OSD (B) I/O characteristic
Symbol Pin SG _ _ _ SG.D SG.D SG. D SG. D 88 88 88 88 88 80 80 80 88 88 Vosd = 1.0V, SW23=ON Vosd = 1.0V, SW23=ON Vosd = 1.0V Vosd = 1.0V 7F 7F 7F 7F 88 88 88 88 88 88 88 88 80 80 80 A0 10 10 88 00 88 01 88 7F 00 00 00 00 00 00 00 FF 00 FF SG. D 16 14 15 16 2 0.81 0.29 1.7 1.7 2.7 2.7 3.7 4.7 V 3.7 4.7 V 2.1 2.5 V 2.1 2.5 V 0.05 0.13 us 0.05 0.13 us 0.05 0.13 us 0.05 0.13 us 0.37 0.45 0.98 1.08 -40 -35 dB -15 -10 dB 5 8 dB 1.1 1.4 1.7 V Vy = 0.0V 1.1 1.4 1.7 V Vy = 0.0V 1.1 1.4 1.7 V Vy = 0.0V 2.6 2.9 3.2 V SG. D SG. D SG. D SG. C Vy = 0.0V 15 2.6 2.9 3.2 V Vy = 0.0V 14 2.6 2.9 3.2 V Vy = 0.0V 88 00 FF 15,16 -100 0 100 mV Vy = 0.0V 88 00 14,15 -100 0 100 mV Vy = 0.0V 88 00 _ -350 0 350 mV 88 10 _ -350 0 350 mV 88 10 _ -350 0 350 mV 88 10 _ _ _ 38 38 38 38 38 38 38 38 38 38 38 38 SG.G 14,16 SG.G 15,16 14 14 14 14 14 15 16 14,15, 16 38 Min. Typ. Max.
Item
Input signal Limits Unit Notes
Test point
Subaddress
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
M61250BFP
EXA(R-G)
Analog OSD (R-G) amplitude difference Analog OSD (G-B) EXA(G-B) amplitude difference Analog OSD (B-R) EXA(B-R) amplitude difference
OFRG
Offset voltage (R-G)
OFBG
Offset voltage (B-G)
C(R)1
C(G)1
C(B)1
R cutoff control characteristic 1 G cutoff control characteristic 1 B cutoff control characteristic 1
C(R)1
Rev.1.0, Sep.23.2003, page 31 of 49
14,15, 16 14,15, SG. C 16 14,15, SG. C 16 23,24, 38 23,24, 38 23,24, 38 23,24, 38 38 SG.A SG.A SG.A SG.A 38 38 38 SG.F, SG.A SG.F, SG.A SG.F, SG.A SG.F, SG.A
C(G)1
C(B)2
Ccon 1
Ccon 2
Ccon 3
R cutoff control characteristic 2 G cutoff control characteristic 2 B cutoff control characteristic 2 Color control characteristic 1 Color control characteristic 2 Color control characteristic 3
MTXRB Matrix ratio R/B
MTXGB Matrix ratio G/B
DOSD1
DOSD2
AOSD1
AOSD2
BB(R)
BB(G)
BB(B)
Digital OSD switching characteristic 1 Digital OSD switching characteristic 2 Analog OSD switching characteristic 1 Analog OSD switching characteristic 2 Blue background function (R) Blue background function (G) Blue background function (B)
WB
White raster function
Symbol Pin 38 SG.A SG.H Variable input frequency Variable input frequency 88 88 88 80 80 80 9F SG.H SG. A SG. A SG.A SG.A SG.H Variable input frequency Variable input frequency SG.H SG.A SG.A SG.A SG.A SG.A 5 840 860 880 s Measured value - VRpo 1 5 18 38 58 s 5 0.8 1.2 1.6 Vpp 5 2.0 2.4 2.8 Vpp 5 1.6 2.0 2.4 Vpp 5 55 57 Hz 5 63 67 Hz 5 1.0 1.5 2 V 88 88 88 88 88 88 88 17 30 00 5 55 60 65 Hz 88 5 55 60 65 Hz 64 18 7 2.0 3.0 10.0 dB 88 11 0.0 0.5 V 11 4.7 5.4 V 00 80 11 21 25 29 s 11 2.5 4.0 5.5 s 11 12.0 13.5 15.0 s 11 -500 -250 Hz 11 250 500 Hz 88 11 15.3 15.7 16.1 kHz 88 38 38 38 38 38 38 38 38 38 38 38 38 38 90 11 15.8 16.2 16.6 kHz 26 11 14.7 15.1 15.5 kHz 20 11 15.3 15.7 16.1 kHz Pin 28=5 V, pin 25=5 V, pin 24=0 V 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 SG Min. Typ. Max.
Item
Input signal Unit Notes
Test point Limits
Subaddress
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
DEF
00
00
00
00
M61250BFP
fH1
fH2
fH3
Hfree
FPHU
FPHL
Deflection system typical conditions Horizontal free-running frequency 1 Horizontal free-running frequency 2 Horizontal free-running frequency 3 Forced horizontal free-running operation Horizontal pull-in range (upper) Horizontal pull-in range (lower)
HPT1
Horizontal pulse timing 1
Rev.1.0, Sep.23.2003, page 32 of 49
HPT2
Horizontal pulse timing 2
HPTW
Horizontal pulse width
VH
HSTA
Horizontal pulse amplitude Horizontal pulse start operation
AFCG
AFC gain operation
fV
Vfree
Vertical free-running frequency Forced vertical free-running operation
SVC
Service mode operation
FPVU
FPVL
Vertical pull-in frequency (upper) Vertical pull-in frequency (lower)
VRsi 1
Vertical ramp size
VRsc 1
VRsc 2
VRpo 1
VRpo 2
Vertical ramp size control range 1 Vertical ramp size control range 2 Vertical ramp position control range 1 Vertical ramp position control range 2
Symbol Pin SG SG.A SG.A 1.35 1.73 2.11 14 Variable input signal duty Pin 28=5 V, pin 25=5 V, pin 24=0 V
Note: This LSI cannot operate correctly if MONI1 is used while the H-free bus bit (13H-D7) is set to 1.
Item Min. 20 1.32 1.50 1.88 2.26 4.9 2.5 4.3 At RF AGC voltage high Pin 18 voltage/pin 59 voltage 0.93 0.95 2.0 2.0 2.0 4.0 4.0 4.0 2.50 2.70 2.50 2.70 100 % Input SYNC ratio measured at H free mode 2.85 V 2.70 V 2.85 V 2.70 V 4.4 Vpp 4.5 Vpp 4.5 V 2.5 Vpp Amplitude measured from blanking level 2.5 Vpp Amplitude measured from blanking level 00 00 2.5 Vpp Amplitude measured from blanking level 00 1.24 Vpp 0.98 4.6 V 3.0 V 5.0 Vpp 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 us 88 00 00 10 20 20 50 60 70 80 90 A0 B0 C0 D0 E0 F0 00 90 10 00 00 88 40 00 00 2.41 ms 88 00 2.03 ms 88 00 1.65 ms 88 00 1.47 1.62 ms 88 00 0.35 0.53 0.65 ms 88 Typ. Max.
Input signal Limits Unit Notes
Test point
Subaddress
00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH
VW 38 38 38 38 38 41 63,64 SG.7 63,64 SG.7 41 41 41 41 41 41 41 SG.A 18 50 18 2.55 18 2.30 18 2.55 18 2.30 SG.A 18 3.6 SG.A 18 3.5 18 3.5 SG.A 18 1.5 SG.A 18 1.5 SG.A 18 1.5 SG.A 18 0.76 18 0.88 18 4.0 18 2.0 SG.A 18 4.0 SG.I 5
Vertical pulse width
38
M61250BFP
VBLKW Vertical blanking width
08 0C 0F
VBLKW VS1 VBLKW VS2 VBLKW VS3
Vertical blanking width VSHIFT1 Vertical blanking width VSHIFT2 Vertical blanking width VSHIFT3
14,15, 16 14,15, SG.A 16 14,15, SG.A 16 14,15, SG.A 16
WVSS
Vertical blanking width
MONIT Intelligent monitor ORING system typical conditions
00
00
00
MONI1
Rev.1.0, Sep.23.2003, page 33 of 49
MONI2
MONI3-1
MONI3-2
MONI6
MONI7
MONI8
MONI9
MONI10
MONI11
MONI12
MONI13
MONI14
MONI15
MONI16
Intelligent monitor 1 (composite sync) Intelligent monitor 2 (AFT) Intelligent monitor 3-1 (RF AGC1) Intelligent monitor 3-2 (RF AGC2) Intelligent monitor 6 (video SW output) Intelligent monitor 7 (G out) Intelligent monitor 8 (R out) Intelligent monitor 9 (B out) Intelligent monitor 10 (ACL) Intelligent monitor 11 (V sync) Intelligent monitor 12 (H out) Intelligent monitor 13 (VIF Vcc) Intelligent monitor 14 (Start-up Vcc) Intelligent monitor 15 (video/chroma Vcc) Intelligent monitor 16 (Hi Vcc)
MONI1-C
Intelligent monitor I-C (Sync ratio at H free mode)
M61250BFP
Method of Measurement of Electrical Characteristics
VIF block * P/N: Video S/N 1. Input SG3, and measure the rms value (noise value) for the signal output from pin 58. 2. The P/N is defined as follows.
P/N = 20 log V0 measured value (Vp-p) x 10 x 0.7 Noise measured value (mVrms)
3
(dB)
* 1. 2. 3.
Vf: Video frequency characteristic Input SG4, and adjust the f2 frequency so that the 1 MHz beat component is output to pin 58. Adjust the voltage applied to pin 62 so that the 1 MHz beat component at pin 62 is 100 dB. Gradually reduce the f2 frequency, and measure the frequency at which the beat component is 3 dB lower than the level at 1 MHz.
* Vin min: Input sensitivity 1. Lower the level of SG5 so that the input level is 3 dB lower than the value measured under video-detection-wave output" for the V0 item. * Vin max: Maximum allowable input 1. Input SG6 at 90 dB. 2. The output level of Pin 58 at this point should be VA. Increase the amplitude of SG6 so that the input level indicates an output level for Pin 58 that is 3 dB lower than VA. * AFT: AFT detection sensitivity V2H: AFT maximum voltage V2L: AFT minimum voltage
AFT is defined as follows.
AFT = (3.0 - 10.) x 103 mV df KHz
(mV/KHz)
Rev.1.0, Sep.23.2003, page 34 of 49
M61250BFP * 1. 2. 3. IM: Inter-modulation Input SG13 to Pins 63 and 64. Measure the 0.92 MHz component and 3.58 MHz component of the pin 58 output. IM is defined as follows.
IM = 20 log 0.92 MHz component 3.58 MHz component
(dB)
* * 1. 2.
DLPH: RF AGC delay maximum point DLPL: RF AGC delay minimum point Input SG5 to pins 63 and 64. Change the amplitude of SG5 and measure the level at which the voltage of pin 59 is 2.5 V.
SIF block * LIM: Input limiting sensitivity Gradually decrease the input level of SG17, and measure the input level at the point when the 400 Hz component of Pin 58 is 3 dB lower than VoAF. * AMR: AMR 1. Measure the 400 Hz component for Pin 54 and set it as Vam. 2. AMR is defined as follows.
AMR = 20 log VoAF (mVrms) Vam (mVrms)
(dB)
* AFSN: AF S/N 1. Measure the noise (20 Hz to 100 kHz) of the Pin 51 output. 2. AF S/N is defined as follows.
AF S/N = 20 log VoAF max Measured value (dB)
Video clock * 2AGTV: Video SW output level (TV input)
* 2AGEV: Video SW output level (External input)
1. Input SG.A to pin 41 (2AGTV) or pin 38 (2AGEV). 2. The amplitude (p-p) at pin 31 is measured. *In order to select TV or external input, use the subaddress 06H. * Ymax: Maximum video output 1. Input SG.A to pin 38.
2. Measure the amplitude (p-p) other than the blanking part of the output of pins 14, 15, 16.
Rev.1.0, Sep.23.2003, page 35 of 49
M61250BFP * FBY: Video frequency characteristic 1. Input SG.B (5 MHz, 0.4 Vp-p) to pin 38.
2. Measure the amplitude (p-p) other than the blanking part of the output of pins 14, 15, 16, take the result to be YB. 3. FYB is defined as follows.
FYB = 20 log YB (Vp-p) GY (Vp-p) (dB)
* CRF1: Chroma trap attenuation 1 (normal R/G/B output) TRF maximum chroma trap attenuation 1. Input SG.C to pin 38, measure the 3.58 MHz frequency level with TRAP ON/OFF (02H D4) DATA 1, take this to be N0. 2. Also measure the level with TRAP ON/OFF (02H D4) DATA 0. 3. CRF1 is defined as follows.
CRF1 = 20 log Measured value (mVp-p) N0 (mVp-p)
(dB)
4. Take the minimum value of CRF1 when the I2C BUS data of the TRAP fine ADJ (12H D0/D1) is adjusted to be TRF. * YDL1: YDL time 1 1. Input SG.A to pin 38. 2. Measure the delay time relative to the input signal of pins 14, 15, 16.
The delay time at 50% rise level is measured.
* 1. 2. 3.
YDL2, 3, 4: YDL time 2, 3, 4 Input SG.A to pin 38. Measure the delay time of the input signal and the pin 14, 15, 16 output signals. YDL2, YDL3, YDL4 are defined as follows.
YDL2 = measured value (ns) - YDL1 (measured value) YDL3 = measured value (ns) - YDL2 (measured value) YDL4 = measured value (ns) - YDL3 (measured value)
* 1. 2. 3. 4.
GTmax: Video tone control characteristic 2 Input SG.B (f = 2.5 MHz) to pin 38. The output amplitude of pins 14, 15, 16 when the video tone data is at the center (20 H) is taken to be GTnor. The output amplitude of pins 14, 15, 16 when the video tone data is maximum is measured. GTmax is defined as follows.
GTmax = 20 log Measured value (Vp-p) GTnor (mVp-p)
(dB)
Rev.1.0, Sep.23.2003, page 36 of 49
M61250BFP * 1. 2. 3. 4. GTmin: video tone control characteristic 3 Input SG.B (f=2.5 MHz) to pin 38. The output amplitude of pins 14, 15, 16 when the video tone data is at the center (20 H) is taken to be GTnor. The output amplitude of pins 14, 15, 16 when the video tone data is minimum is measured. GTmin is defined as follows.
GTmin = 20 log Measured value (Vp-p) GTnor (mVp-p)
(dB)
* 1. 2. 3. 4.
GT2M: Video tone control characteristic 4 Take pin 14, 15, 16 output amplitude when input signal frequency is 2.5 MHz to be GTnor. Input SG.B (f = 2 MHz) to pin 38. Measure pin 14, 15, 16 output amplitude. GT2M is defined as follows.
GT2M = 20 log Measured value (Vp-p) GTnor (mVp-p)
(dB)
* 1. 2. 3. 4.
GT5M: Video tone control characteristic 5 Take pin 14, 15, 16 output amplitude when input signal frequency is 2.5 MHz to be GTnor. Input SG.B (f = 2 MHz) to pin 38. Measure pin 14, 15, 16 output amplitude. GT5M is defined as follows.
GT5M = 20 log Measured value (Vp-p) GTnor (mVp-p)
(dB)
* BLS: black stretch characteristic 1. Input SG.K to pin 38. 2. With black stretch off (02H D1 = 1), adjust the contrast (05H) and brightness (0AH), and set the pin 14, 15, 16 output level of the first stage (lowest stage) to 2.0 V, and the output level of the eighth stage (highest stage) to 4.6 V. 3. Change black stretch to on (02H D1 = 0), and measure the pin 14, 15, 16 first stage output level. 4. BLS is defined as follows.
BLS = 2.0 - measured value (V)
* 1. 2. 3.
VMF: Video mute function Input SG.A to pin 38. With the mute switch (02H D7) on "VMFon", off "VMFoff", measure the output amplitude. VMF is defined as follows.
VMF = 20 log VMFon (Vp-p) VMFoff (Vp-p)
(dB)
Rev.1.0, Sep.23.2003, page 37 of 49
M61250BFP Chroma block * CnorR: Chroma typical output (R-Y) * CnorB: Chroma typical output (B-Y) 1. Input SG.C to pin 38.
2. When "test mode" I2C data is 18H D6=1, 18H D7=1 and 19H D6=1 and when "test mode" I2C data is 18H D6=0, 18H D7=1 and 19H D6=1, take the pin 59 output amplitude to be the chroma typical output (R-Y) and chroma typical output (B-Y), respectively.
* 1. 2. 3. ACC1: ACC characteristic 1 Input SG.E (eb=570 mV: level + 6 dB) to pin 38. Measure the pin 59 output amplitude. ACC1 is defined as follows.
ACC1 = 20 log measured value (mVp-p) chroma typical output 1 (mVp-p)
(dB)
* ACC2: ACC characteristic 2 1. Input SG.E (input level: -18 dB) to pin 38.
2. Measure the pin 59 output amplitude. 3. ACC2 is defined as follows.
ACC2 = 20 log measured value (mVp-p) chroma typical output 1 (mVp-p) (dB)
* 1. 2. 3.
OV: Chroma overload characteristic Input SG.E (eb=800 mVp-p) to pin 38. Measure the pin 59 output amplitude. OV is defined as follows.
OV = 20 log measured value (mVp-p) chroma typical output 1 (mVp-p)
(dB)
* VikN: Killer operation input level 1. Input SG.E (variable level) at input level 0 dB to pin 38. 2. While monitoring the pin 59 output amplitude, lower the input level, and measure the input level when the output amplitude vanishes. * KillP: Hue remaining with killer 1. Input SG.E (level: -40 dB) to pin 38.
2. Measure the pin 59 output amplitude.
* * 1. 2. APCU: APC pull-in range (upper) APCL: APC pull-in range (lower) Input SG.E (feb-fec-3.579545 MHz) to pin 38. After raising the frequency until the output from pin 59 vanishes, lower the frequency, and take the point at which an output appears to be fu.
3. After lowering the frequency until the output from pin 59 vanishes, raise the frequency, and take the point at which an output appears to be fl. 4. APCU and APCL are defined as follows.
APCU = fu - 3579545 Hz APCL = fl - 3579545 Hz
Rev.1.0, Sep.23.2003, page 38 of 49
M61250BFP * 1. 2. 3. 4. R/BN: Demodulation ratio R-Y/B-Y Input SG.E (eb = single chroma = ec + 50 kHz) to pin 38. Take the pin 59 output amplitude when "test mode" I2C data is 18H D6=1, D7=1 to be VRY. Take the pin 59 output amplitude when "test mode" I2C data is 18H D6=0, D7=1 to be VBY. R/BN is defined as follows.
R/BN = VRY (mVp-p) VBY (Vp-p)
(dB)
R/BU, G/BU: Demodulation ratio R/BJ, G/BJ: Demodulation ratio Input SG.J to pin 38. Take the pins 14, 15, 16 output amplitude when video mute on ( 02H D7 = 1, D7 = 1) and US mode (15H D3 = 1) are specified to be URY, UGY, and UBY, respectively. 3. Take the pins 14, 15, 16 output amplitude when video mute on ( 02H D7 = 1, D7 = 1) and JPN mode (15H D1 = 1, D2=1) are specified to be JRY, JGY, and JBY, respectively. 4. R/BU, G/BU, R/BJ, and G/BJ are defined as follows.
* * 1. 2.
* 1. 2. 3. 4.
R-YN: Demodulation angle Input SG.E (eb = single chroma = ec + 5 kHz) to pin 38. Take the pin 59 output amplitude when "test mode" I2C data is 18H D6=1, D7=1 to be VRY. Take the pin 59 output amplitude when "test mode" I2C data is 18H D6=0, D7=1 to be VBY. R/YN is defined as follows.
*The vector is determined taking the demodulator gain into account. * TC1: TINT control characteristic 1 * TC2: TINT control characteristic 2 1. Input SG.C (see figure below) to pin 38. Measure the absolute angle with reference to the pin 59 output voltage, referring to the figure below.
2. Take the TINT data center part (07H data 40H) to be reference angle "TC", determine the TINT DATA maximum and minimum values. TC1 and TC2 are defined as follows.
TC = TCmax - TC(deg) TC = TC - TCmin (deg)
Rev.1.0, Sep.23.2003, page 39 of 49
M61250BFP RGB interface block * VBKL: Output blanking voltage 1. Input SG.A to pin 38.
2. Measure the voltage of the pin 14, 15, 16 pedestal and blanking parts.
* * 1. 2. * * 1. 2.
GYmax: Contrast control characteristic 1 GYmin: Contrast control characteristic 2 Input SG.B (f=100 kHz) to pin 38. Measure the pin 14, 15, 16 output amplitude. GYEnor: Contrast control characteristic 3 GYEmin: Contrast control characteristic 4 Input SG.A to pin 38. Measure the pin 14, 15, 16 output amplitude when applying 2.9 V and 0 V to pin 33.
* GYEclip: Contrast control characteristic 5 1. Input SG.F to pins 21, 22, 23, 24. 2. Minimize the contrast control data, and measure the output amplitude at and above the pedestal part of pins 14, 15, 16. The amplitude of the blanking part is not measured. * * * 1. 2. Lum nor: Brightness control characteristic 1 Lum max: Brightness control characteristic 2 Lum min: Brightness control characteristic 3 Input SG.D (Vy=0 V) to pin 38. Measure the DC voltage other than the blanking part of the output of pins 14, 15, 16.
* D(R)1: R drive control characteristic 1 1. Input SG.A to pin 38.
2. Measure the pin 14 output amplitude when the drive control data is at center and is maximum, take the results to be DRnor and DRmax respectively. 3. D(R)1 is defined as follows.
* D(B)1: B drive control characteristic 1 1. Input SG.A to pin 38. 2. Measure the pin 16 output amplitude when the drive control data is at center and is maximum, take the results to be DBnor and DBmax respectively. 3. D(B)1 is defined as follows.
Rev.1.0, Sep.23.2003, page 40 of 49
M61250BFP
* D(R)2: R drive control characteristic 2 1. Input SG.A to pin 38. 2. Measure the pin 14 output amplitude when the drive control data is at center and is minimum, take the results to be DRnor and DRmin respectively. 3. D(R)2 is defined as follows.
* D(B)2: R drive control characteristic 2 1. Input SG.A to pin 38. 2. Measure the pin 16 output amplitude when the drive control data is at center and is minimum, take the results to be DBnor and DBmin respectively. 3. D(B)2 is defined as follows.
* * * 1. 2.
EXD(R): Digital OSD(R) input/output characteristic EXD(G): Digital OSD(G) input/output characteristic EXD(B): Digital OSD(B) input/output characteristic Input SG.F (Vosd=1.0 V) to pins 21, 22, 23, 14. Measure the output amplitude at and above the pedestal part in pins 14, 15, 16. The amplitude of the blanking part is not measured.
* * * 1.
EXD(R-G): Digital OSD (R-G) amplitude difference EXD(G-B): Digital OSD (G-B) amplitude difference EXD(B-R): Digital OSD (B-R) amplitude difference EXD(R-G), EXD(G-B) and EXD(B-R) are defined as follows.
EXD(R-G) = EXD(R)-EXD(G) EXD(G-B) = EXD(G)-EXD(B) EXD(B-R) = EXD(B)-EXD(R)
Rev.1.0, Sep.23.2003, page 41 of 49
M61250BFP * * * 1. 2. EXA(R): Analog OSD(R) input/output characteristic EXA(G): Analog OSD(G) input/output characteristic EXA(B): Analog OSD(B) input/output characteristic Input SG.F (Vosd=1.0 V) to pins 21, 22, 23, 14. Measure the output amplitude at and above the pedestal part in pins 14, 15, 16. The amplitude of the blanking part is not measured.
* * * 1.
EXA(R-G): Analog OSD (R-G) amplitude difference EXA(G-B): Analog OSD (G-B) amplitude difference EXA(B-R): Analog OSD (B-R) amplitude difference EXA(R-G), EXA(G-B) and EXA(B-R) are defined as follows.
EXA(R-G) = EXA(R)-EXA(G) EXA(G-B) = EXA(G)-EXA(B) EXA(B-R) = EXA(B)-EXA(R)
* * * * * * 1. 2. * * * 1. 2. 3. 4.
C(R)1: R cutoff characteristic 1 C(G)1: G cutoff characteristic 1 C(B)1: B cutoff characteristic 1 C(R)2: R cutoff characteristic 2 C(G)2: G cutoff characteristic 2 C(B)2: B cutoff characteristic 2 Input SG.D (Vy=0 V) to pin 38. Measure the DC voltage of other than the blanking part in the outputs of pins 14, 15, 16. Ccon1: color control characteristic 1 Ccon2: color control characteristic 2 Ccon3: color control characteristic 3 Input SG.C to pin 38. Measure the output amplitudes of pins 14, 15, 16 when IIC DATA 08H=40h, take this to be Ccon0. Measure the output amplitudes of pins 14, 15, 16 under each set of conditions. Ccon1, Ccon2, Ccon3 are defined as follows.
Ccon1, Ccon2, Ccon3 = 20 log measured value (Vp-p) Ccon0 (Vp-p)
(dB)
Rev.1.0, Sep.23.2003, page 42 of 49
M61250BFP * * 1. 2. 3. MTXRB: Matrix ratio R/B MTXGB: Matrix ratio G/B Input SG.G (rainbow color bar) to pin 38. Measure the output amplitude when pins 14, 15, 16 are respectively VR, VG, VB. MTXRB, MTXGB are defined as follows.
* * 1. 2.
DOSD1: Digital OSD switching characteristic 1 DOSD2: Digital OSD switching characteristic 2 Input SG.F (Vosd=1.0 V) to pins 21, 22, 23, 24. Measure the rise time and fall time of the output signals of pins 14, 15, 16 at and above pedestal level. The blanking part is not measured.
* * 1. 2.
AOSD1: Analog OSD switching characteristic 1 AOSD2: Analog OSD switching characteristic 2 Input SG.F (Vosd=1.0 V) to pins 21, 22, 23, 24. Measure the rise time and fall time of the output signals of pins 14, 15, 16 at and above pedestal level. The blanking part is not measured.
* * * 1. 2.
BB(R): Blue back function (R) BB(G): Blue back function (G) BB(B): Blue back function (B) Input SG.A to pin 38. Measure the output amplitude (p-p) of pins 14, 15, 16 other than the blanking part.
Rev.1.0, Sep.23.2003, page 43 of 49
M61250BFP * WB: White raster function 1. Input SG.A to pin 38. 2. Measure the output amplitude (p-p) of pins 14, 15, 16 other than the blanking part.
Deflection block * fH1: Horizontal free-running frequency 1 * fH2: Horizontal free-running frequency 2 * fH3: Horizontal free-running frequency 3 Measure the frequency of pin 11 with no input. * Hfree: Forced horizontal free-running operation 1. Input SG.A to pin 38. 2. Set H-FREE CONTROL DATA to on, measure the frequency at pin 11. * FPHU: Horizontal pull-in range (upper) * FPHL: Horizontal pull-in range (lower) 1. Input SG.H to pin 38. 2. Change the frequency of SG.H, measure the frequency range for which the pin 11 output signal and pin 38 input signal are pulled in, with respect to the video signal horizontal frequency. * HPT1: Horizontal pulse timing 1
* HPT2: Horizontal pulse timing 2 1. Measure the horizontal pulse timing using the method for HPT1. 2. Typical
HPT2 = (measured value) - HPT1
* HPTW: Horizontal pulse width * VH: Horizontal pulse amplitude
Rev.1.0, Sep.23.2003, page 44 of 49
M61250BFP * HSTA: Horizontal pulse stop operation Confirm that when H.START SW OFF (0FH:D7=0), the horizontal output goes low. * AFCG: AFC gain operation 1. Measure the pin 7 output amplitude during AFC switching, taking the result during SW ON to be AFCon, and during SW OFF to be AFCoff. 2. AFCG is defined as follows.
* fV: Vertical free-running frequency Measure the pin 5 output frequency with no input. * Vfree: Forced vertical free-running operation 1. Input SG.A to pin 38. 2. Set V-FREE CONTROL DATA to on, measure the pin 5 output amplitude. * SCV: Service mode operation Measure the pin 5 output DC voltage with the service switch on. * FPVU: Vertical pull-in frequency (upper) * FVPL: Vertical pull-in frequency (lower) Change the SG.H vertical frequency, and measure the frequency when the pin 5 output waveform is pulled in. * VRsi: Vertical ramp size * VRsc1: Vertical ramp size control range 1 * VRsc2: Vertical ramp size control range 2
* VRpo1: Vertical ramp position control range 1
* VRpo2: Vertical ramp position control range 2 1. Measure the vertical ramp timing using the same method as for VRpo1. 2. VRpo2 is defined as follows.
VRpo2 = (measured value) -VRpo1
Rev.1.0, Sep.23.2003, page 45 of 49
M61250BFP * VW: Vertical pulse width
* VBLKW: Vertical BLK width
* WVSS: Minimum width at minimum sync operation Reduce the width of the SG.I signal, and measure the input signal width when the pin 5 output waveform pull-in is lost.
Rev.1.0, Sep.23.2003, page 46 of 49
M61250BFP The following function is added to the M61250BFP (VBLKWVS1 to VBLKWVS3) The vertical blanking width can be specified independently of VSHIFT. Note, however, that it operates in the same way as conventional products in the initial state.
The following bits are added to the I2C register. * VBLK SHIFT ON (1CH D3) Initial value = 0
0: Shifts the VBLK based on the conventional SHIFT 1: Shifts the VBLK based on the VBLK SHIFT.
* VBLK SHIFT (1CH D2 to 1CH D0) Initial value = 4
0: VBLK period is 260 H to 21 H. 1: VBLK period is 260 H to 21 H. 2: VBLK period is 260 H to 23 H. 3: VBLK period is 260 H to 25 H. 4: VBLK period is 260 H to 27 H. 5: VBLK period is 260 H to 29 H. 6: VBLK period is 260 H to 31 H. 7: VBLK period is 260 H to 33 H.
Imaging period 523 524 525 1 2 3 4 5 6 7 8 9 10 11 12 20 21 23 25 27 29 31 33 35 Equivalent pulse Vertical synchronization Equivalent pulse Imaging period
VOUT(VSHIFT based shift)
VBLK (VBLK SHIFT=0) (VBLK SHIFT=1) (VBLK SHIFT=2) (VBLK SHIFT=3) (VBLK SHIFT=4) (VBLK SHIFT=5) (VBLK SHIFT=6) (VBLK SHIFT=7)
* An image may be output during the V blanking period according to the VSHIFT value. In this case, the VBLK should be shifted in order not to output the image during the blanking period. Carefully consider this because the output condition changes according to the circuit connected externally.
Rev.1.0, Sep.23.2003, page 47 of 49
M61250BFP
Important Information
* Each application should be thoroughly studied and evaluated before making a decision. * 47 mF and higher electrolytic capacitors and 0.01 mF and higher ceramic capacitors should be connected in parallel between each of the power supply pins (3, 4, 12, 39, 42, 44) and ground pin. In addition, it is recommended that the connectors be made as close to the IC power supply pins as possible. * The C-SYNC output operation of the intelligent monitor (18 pins) cannot be guaranteed at Hfree (13H: D7 = 1) . * When purchasing I2C bus components, a license to use these components within a 12C bus system is provided under the 12C patent rights of Philips Corp. However, the bus system must conform to the 12C specifications stipulated by Philips.
Rev.1.0, Sep.23.2003, page 48 of 49
64P6U-A
JEDEC Code -- MD HD Weight(g) Lead Material Cu Alloy
M61250BFP
MMP
Plastic 64pin 14 14mm body LQFP
EIAJ Package Code LQFP64-P-1414-0.8
e
Package Dimensions
b2
D
49
64
l2
48
E
16
33
17
32
HE
A2
A3
Lp
Detail F
c
y x
M
b
A1
Rev.1.0, Sep.23.2003, page 49 of 49
1
Recommended Mount Pad Symbol
A F L1
e
A A1 A2 b c D E e HD HE L L1 Lp
A3
L
x y b2 I2 MD ME
Dimension in Millimeters Min Nom Max -- -- 1.7 0.1 0.2 0 -- -- 1.4 0.32 0.37 0.45 0.105 0.125 0.175 13.9 14.1 14.0 13.9 14.1 14.0 0.8 -- -- 16.0 15.8 16.2 15.8 16.2 16.0 0.3 0.5 0.7 1.0 -- -- 0.45 0.6 0.75 -- 0.25 -- -- -- 0.2 0.1 -- -- 0 8 -- 0.5 -- -- -- -- 0.95 -- 14.4 -- -- -- 14.4
ME
Sales Strategic Planning Div.
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